While putting together ESNUG 414, I noticed how well Tenison's cycle-based Verilog to SystemC VTOC simulator did in a user benchmark. Robert Clark of Parama Networks reported seeing 14x to 29x speed-ups over VCS 7.0 on his two VTOC benchmarks. I had to call Brett Cline of Forte. Brett's been my sparring buddy on SystemC ever since ESNUG 412 where he beat me up using my own data to show how SystemC has a 38 percent approval rating amongst users for architectural explorations. I called Brett on the Tenison benchmark to congradulate him, especially since Synopsys had pretty much abandoned SystemC to promote System Verilog.

 "Your death of SystemC is greatly exaggerated," said Brett. "SystemC use is growing by leaps and bounds, John. It's its own ecosystem now."

"Only hard data speaks. Everything else is fluff," I replied.

"Well," responded Brett, "at DAC, we had meetings/demos with 182 engineers from 84 companies. Plus over 400 people overflowed the SystemC luncheon on Tuesday afternoon. I'll get the others to respond, too."

"This was our biggest DAC ever," emailed Alan Naumann, CEO of CoWare. "Weshowed our ConvergenSC to more than 400 engineers at our booth, suite, andpartner breakfast with ARM and Verisity.

We saw bookings grow 250 percent over last year. CoWare and SystemC are definitely on a roll." "We had over 400 engineers from 170 companies at DAC looking at our SystemC tools," added Rami Rachamim of Summit Design. "We also had 350 people attend our own ESL seminar, too. SystemC isn't niche any more."

And Carl Harris of Kluwer Academic Books said that his #2 and #6 DAC best sellers this year were on SystemC. Hmmmmm.

The only people who refused hard data was Cadence. I'm looking forward to calling Brett on that one. If big olde Cadence can't make money off of SystemC, it doesn't bode well for Brett's ecosystem. Grin.

John Cooley runs the E-mail Synopsys Users Group (ESNUG), is a contract ASIC designer, and loves hearing from engineers at "jcooley@TheWorld.com" or (508) 429-4357.